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EU consortium to lay groundwork for spin waves as future chip technology
Project CHIRON funded by prestigious Horizon 2020 FET-Open grant and coordinated by imec
One of the candidate technologies to complement or even replace today’s CMOS in future chips is spin wave technology, a new way of computing by using the interference of nanoscale waves of magnetization. Compared to logic gates and circuits build by CMOS, spin wave circuitry potentially require significantly less power and area. A consortium led by imec, one of Europe’s premier R&D centers in nanotech, now aims for a breakthrough by developing the basic layer of the technology: the basic logic gates needed to enable spin wave computing. The effort will require a highly interdisciplinary approach by the consortium comprising partners with expertise in materials science, physics, manufacturing, electrical engineering, device simulation, and circuit design. The project – named CHIRON – started May 1st and is funded under the Horizon 2020 FET-Open Research and Innovation Action.
It is forever getting more difficult to wrangle more computing power – following Moore’s law – from chips based on CMOS technology. One day in the not so far future, the limit will be reached of how dense CMOS transistors, logic gates and circuits can be made. Considering how long it takes to bring a new technology to fruition, it is essential to start laying the foundations now. One enticing candidate to complement and eventually replace CMOS is spin wave computing. To perform logic operations, spin wave computing exploits the magnetization state of a nanoscale magnet rather than the charge of individual electrons as in CMOS. In such a magnetic material, the magnetization can oscillate, essentially creating nanoscale waves of magnetization that can propagate, the so-called spin waves. These have wavelengths in the micrometer to nanometer range and frequencies in the gigahertz (GHz) to terahertz (THz) range.
As a first step towards a full spin wave computer, the CHIRON consortium envisions hybrid spin wave–CMOS circuits that can be readily integrated alongside CMOS. To enable these, the consortium’s scientists target a groundbreaking proof of principle of the essential elements needed for hybrid spin wave–CMOS computing. They will do so by fabricating basic logic gates, such as inverters and majority gates, demonstrate their operation, and assess their performance. To make the interface between CMOS and spin wave technology, the partners will develop nanoresonators that are at today’s limit of what is possible with nano-electromechanical systems (NEMS). With these hybrid spin wave–CMOS circuits will be designed and benchmarked against full CMOS circuits.
CHIRON is funded by a grant from the Horizon 2020 FET-Open Research and Innovation Action. With these grants the EU wants to promote excellent collaborative research and innovation on future and emerging technologies. The goal is to secure and renew the basis for future European competitiveness and growth. FET-supported projects aim to make a difference for society in the decades to come.
The CHIRON consortium is coordinated by imec (Leuven, Belgium), and further consists of